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OR1200_verilog
- or1200开源risc cpu的verilog描述实现，cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog descr iption of the risc cpu realize, cpu source code analysis and chip design source book
OpenRISC
- 一个开放的risc，已应用到实际中，可以借鉴的不少，大家-an open RISC, has been applied to practice, we can draw a lot, we look at
sparc_verilog
- open risc微处理器的verilog源码。基于sparc架构，可以直接综合。适合cpu的学习-open risc microprocessor verilog source. Based on sparc architecture can be directly integrated. Learning for the cpu
1160037925_1_FT224_iso7816_vcc
- iso7816_plain.c implements an interface between an RS-232 serial port and an ISO 7816 smart card, and is targeted for the Atmel AT90S2313 microcontroller in a development terminal. The source code is written entirely in C using the WinAVR tool suite.
Simply-RISC-S1-Source-code
- 开源可扩充处理器架构，源代码，用来查询非常好，值得下载。-The open-source extensible processor architecture, used to query the source code, very good, it is worth to download
or1200_ep3c16_board
- OpenRisc是OpenCores组织提供的基于GPL协议的开放源代码的RISC（精简指令集计算机）处理器。有人认为其性能介于ARM7和ARM9之间，适合一般的嵌入式系统使用。最重要的一点是OpenCores组织提供了大量的开放源代码IP核供研究人员使用，因此对于一般的开发单位具有很大的吸引力。-OpenRisc is based organizations OpenCores the GPL open source RISC (Reduced Instruction Set Computer